{"id":1470,"date":"2025-04-11T05:38:47","date_gmt":"2025-04-11T05:38:47","guid":{"rendered":"https:\/\/webprojects.cloud\/wordpress\/splatco\/?post_type=spl_knowledgebase&p=1470"},"modified":"2025-06-10T06:10:01","modified_gmt":"2025-06-10T06:10:01","slug":"mmi202-cpu-device","status":"publish","type":"spl_knowledgebase","link":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/","title":{"rendered":"MMi202: CPU device"},"content":{"rendered":"\n

Note: This applies to the MMi202<\/strong><\/p>\n\n\n\n

The MMi202 can respond to UV instructions that address the CPU <\/a>device<\/a>. Some of the responses are dependent on the hardware configuration.<\/p>\n\n\n\n

Board Type<\/h6>\n\n\n\n

The board will respond to the following board-type poll:<\/p>\n\n\n\n

  SPxPoll2      3,!CPU<\/a><\/pre>\n\n\n\n
by placing its board type identification number on U0 and U1. The response is a function of the type (model) of board and the number of connected XPice expansion boards (e.g. XBIO16<\/a>, XIRO16<\/a>, HIO16<\/a>), FP16<\/a>. The numbers can be fetched from U0 and U1 by the PushU<\/a><\/code> instruction.<\/p>\n\n\n\n
The following table defines the responses for the MMi203, MMi201and MMi200 with varying amounts of expansion:<\/p>\n\n\n\n
Configuration<\/td>U0<\/td>(MMi202\/3)<\/td>(MMi201)<\/td>(MMi200)<\/td><\/tr>
MMi20x<\/td>0<\/td>76<\/td>64<\/td>53<\/td><\/tr>
MMi20x+16XPice<\/td>0<\/td>77<\/td>65<\/td>54<\/td><\/tr>
MMi20x+32XPice<\/td>0<\/td>78<\/td>66<\/td>55<\/td><\/tr>
MMi20x+48XPice<\/td>0<\/td>79<\/td>67<\/td>56<\/td><\/tr>
MMi20x+64XPice<\/td>0<\/td>80<\/td>68<\/td>57<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
Interpreting the number of XPice points can be a little tricky. For boards with segregated inputs and outputs, like XIRO16 and HIO16, each 8I\/8O board corresponds to 16 XPice points. For the XBIO16, each bidirectional point corresponds to one input and one output (and appears as such on the SPLat\/PC screen). That means one XBIO16 board gets counted as 32 XPice points although it only adds 16 I\/O points to your configuration.<\/p>\n\n\n\n
Total I\/O capacity<\/h6>\n\n\n\n
The instruction<\/p>\n\n\n\n
SPxChIn        0,!CPU<\/pre>\n\n\n\n
will return the following information in U, where it can be accessed with the PushU<\/a><\/code> instruction:<\/p>\n\n\n\n
U0<\/td>Number of digital inputs<\/td><\/tr>
U1<\/td>Number of digital outputs<\/td><\/tr>
U2<\/td>Number of analog inputs<\/td><\/tr>
U3<\/td>Number of analog outputs<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
As with the board type information, interpreting the number of XPice points can be a little tricky. The safest way to use this information is to differentiate between known configurations of your product. For example, you could sell a product with an optional feature that is controlled through an expansion board that may or may not be present.<\/p>\n\n\n\n
Data Set Ready line<\/h6>\n\n\n\n
The MMi202contains a Data Set Ready (DSR) line on its communications interface.<\/p>\n\n\n\n
The instruction<\/p>\n\n\n\n
SPxCmd0        1,!CPU<\/pre>\n\n\n\n
will turn on (raise) DSR<\/p>\n\n\n\n
The instruction<\/p>\n\n\n\n
SPxCmd0        0,!CPU<\/pre>\n\n\n\n
will turn off (drop) DRS<\/p>\n\n\n\n
The MMi203 does not have this pin<\/p>\n\n\n\n
Earlier versions of this page referred to this pin as RTS. Because the female comms connector is pinned as a DCE (Data Communication Equipment) the correct name is Data Set Ready (RTS is an input on a DCE (aka modem)<\/p>\n\n\n\n
PWM base frequency (Firmware<\/a> V3.15 or later)<\/h6>\n\n\n\n
The analog outputs on the board are generated by a pulse width modulated digital pulse train which is filtered (averaged) by an analog filter to produce a DC output. Normally the frequency of the PWM pulse train is 16kHz. The base frequency can however be altered using the instruction:<\/p>\n\n\n\n
SPxCmd1          0,!CPU<\/pre>\n\n\n\n
with register U0 preset to a value between 0 and 7. The resulting PWM frequencies are given in the following table:<\/p>\n\n\n\n
U0<\/th>PWM frequency<\/th><\/tr>
0<\/td>16kHz (Default)<\/td><\/tr>
1<\/td>8kHz<\/td><\/tr>
2<\/td>4kHz<\/td><\/tr>
3<\/td>2kHz<\/td><\/tr>
4<\/td>1kHz<\/td><\/tr>
5<\/td>500Hz<\/td><\/tr>
6<\/td>250Hz<\/td><\/tr>
7<\/td>125Hz<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
Any other value will result in a fatal runtime error.<\/p>\n\n\n\n
All analog output pins are affected. This feature is designed to be used with PWM output circuits such as DC motor speed controls. Be aware that a low PWM frequency will have an impact on any actual analog (filtered DC) outputs. Our filter circuits are normally designed for the default PWM frequency. Using a much lower frequency will produce ripple in the DC output.<\/p>\n\n\n\n
When used with an AnOut<\/a><\/code> instruction, the resolution is 8 bits. With fAnOut<\/a><\/code> it is 10 bits.<\/p>\n\n\n\n
Modify SuperTimer 10mS clock interval (Dialect<\/a>\u00a020 or later)<\/h6>\n\n\n\n
You can change the basic 10mS SuperTimer clock interval to some other value. Set U0 to the required value in mS and then execute a<\/p>\n\n\n\n
         SPxCmd1         1,!CPU<\/pre>\n\n\n\n
This affects all timers that use the SuperTimer mechanism, which is any timer that can have a duration counter up to 16,777,215 (Pause<\/a><\/code>, fSTTimeSince<\/a><\/code>, WaitOnT<\/a><\/code>, etc). If you set the interval to 1, the timing will run 10 times faster than normal. If you set it to 256, the timing will run 25.6 times slower<\/em> than normal giving you a timing range of 49.7 days. Due to the resolution of the internal math, the re-scaling will produce an error of up to 0.2% at the slow end of the scale. The actual error will be the error produced by rounding 65,536\/U0 to the nearest integer. If U0=0 it reverts to the default 10mS.<\/p>\n\n\n\n
Note that it makes little sense to run the SuperTimers with a clock that is faster than the “loop time” of your program.<\/p>\n\n\n\n
LCD backlight dimming control<\/h6>\n\n\n\n
The following applies only to MMi203 boards connected to a special dimmable LCD and fitted with V3.21 or later Firmware.<\/p>\n\n\n\n
The following is old, and included for reference, or very special circumstances. The OBLCD_Dim instruction provides an easier way of controlling dimming.<\/p>\n\n\n\n
The board\/Firmware supports a timer that automatically dims the backlight after a set time interval with no user activity, as determined by presses of the front panel push buttons.<\/p>\n\n\n\n
The code:<\/p>\n\n\n\n
SetU 0,BL_HighLevel<\/p>\n\n\n\n
SetU 1,BL_LowLevel<\/p>\n\n\n\n
SPxCmd2 1,!CPU<\/p>\n\n\n\n
will set the maximum, undimmed (BL_HighLevel) and minimum, dimmed (BL_LowLevel) brightness levels of the backlight. The two levels must be in the range 0 (minimum) to 8 (maximum). Any other values will produce an error.<\/p>\n\n\n\n
The code:<\/p>\n\n\n\n
SetU 0,BL_DimTime<\/p>\n\n\n\n
SPxCmd1 4,!CPU<\/p>\n\n\n\n
Will set the auto-dim timer value to BL_DimTime minutes. The allowable range is 0 to 255 (4h15m). Using 0 dims the backlight instantly.<\/p>\n\n\n\n
Example: LCD backlight auto-off timer.<\/p>\n\n\n\n
CPU temperature readout Dialect 21 or later<\/h6>\n\n\n\n
An SPxPoll4 0,!CPU<\/code> returns the floating point temperature of the CPU chip in \u00b0C at locations U(0) –> U(3)<\/p>\n\n\n\n
An SPxPoll4 1,!CPU<\/code> returns the floating point temperature of the CPU chip in \u00b0F at locations U(0) –> U(3)<\/p>\n","protected":false},"excerpt":{"rendered":"
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Some of the responses are dependent on the...","og_url":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/","og_site_name":"SPLat Controls","article_modified_time":"2025-06-10T06:10:01+00:00","twitter_card":"summary_large_image","twitter_misc":{"Est. reading time":"5 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"WebPage","@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/","url":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/","name":"MMi202: CPU device - SPLat Controls","isPartOf":{"@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#website"},"datePublished":"2025-04-11T05:38:47+00:00","dateModified":"2025-06-10T06:10:01+00:00","breadcrumb":{"@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/mmi202-cpu-device\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/webprojects.cloud\/wordpress\/splatco\/"},{"@type":"ListItem","position":2,"name":"Product documentation","item":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/"},{"@type":"ListItem","position":3,"name":"Product documentation: Controllers","item":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/"},{"@type":"ListItem","position":4,"name":"MMi203 product documentation","item":"https:\/\/webprojects.cloud\/wordpress\/splatco\/knowledgebase\/product-documentation\/product-documentation-controllers\/mmi203-product-documentation\/"},{"@type":"ListItem","position":5,"name":"MMi202: CPU device"}]},{"@type":"WebSite","@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#website","url":"https:\/\/webprojects.cloud\/wordpress\/splatco\/","name":"SPLat Controls","description":"OEM Embedded Machine Controllers","publisher":{"@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/webprojects.cloud\/wordpress\/splatco\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#organization","name":"SPLat Controls","url":"https:\/\/webprojects.cloud\/wordpress\/splatco\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#\/schema\/logo\/image\/","url":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-content\/uploads\/2024\/10\/logo.svg","contentUrl":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-content\/uploads\/2024\/10\/logo.svg","caption":"SPLat Controls"},"image":{"@id":"https:\/\/webprojects.cloud\/wordpress\/splatco\/#\/schema\/logo\/image\/"}}]}},"_links":{"self":[{"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/spl_knowledgebase\/1470","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/spl_knowledgebase"}],"about":[{"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/types\/spl_knowledgebase"}],"author":[{"embeddable":true,"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/users\/1"}],"up":[{"embeddable":true,"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/spl_knowledgebase\/1422"}],"wp:attachment":[{"href":"https:\/\/webprojects.cloud\/wordpress\/splatco\/wp-json\/wp\/v2\/media?parent=1470"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}